崗位薪資：面議
崗位職責(zé)：
l 參與嵌入式EEPROM IP及standalone EEPROM產(chǎn)品的電路設(shè)計(jì)工作
l 負(fù)責(zé)EEPROM全芯片的功能性能仿真
l 參與相關(guān)的失效分析工作，協(xié)助質(zhì)量部門分析及提升產(chǎn)品可靠性；協(xié)助測(cè)試，TD等部門提升產(chǎn)品良率
l 對(duì)版圖工程師進(jìn)行必要的協(xié)助和指導(dǎo)
技能需求
l 理解CMOS電路基本原理，掌握基本的電路設(shè)計(jì)技能
l 對(duì)CMOS工藝，特別是NVM工藝、器件有一定的了解
l 熟練使用EDA工具進(jìn)行電路設(shè)計(jì)仿真
l 具備基本的版圖設(shè)計(jì)知識(shí)
教育背景
微電子相關(guān)專業(yè)碩士/本科
Responsibilities:

• Develop and design EEPROM for stand alone and embedded application.
• Build the memory architecture and evaluate the loading during pre-layout design phase
• Optimize the leaf circuit based on different requirement

• Understand CMOS process and high voltage EEPROM/Flash process.
• Understand device physics and design rule. The layout experience is in advantage
• EDA tools experience such as hspice/spectre/composer etc.
• Good personal skill and a team player.
• Can read, write English very well. Spoken English is preferred.