- 18萬-30萬/年
- 上海
- |
- 3年以上
- |
- 本科
- |
- 全職
職位誘惑: 股票期權(quán),技能培訓(xùn),五險(xiǎn)一金,年終獎(jiǎng)金,老板nice,技術(shù)領(lǐng)先,成長空間大,十八薪
發(fā)布時(shí)間: 2019-07-05發(fā)布
職位描述
Job description:
- Individual will work closely with analog/mixed-signal engineers in the floor-plan, layout, and physical design of highly-integrated SoCs.
Qualifications:
- 2+ years experience with Cadence Virtuoso, Mentor Calibre, Synopsys.
- DRC, LVS, Metal Fill, Tapeouts, Metal Rules, Electromigration, Fringe Cap, Via rules, Matching, Inductance noise, wire resistance.
- Basic understanding of IC design (RLC circuits and Kirchoff’s Law, symmetry, frequency response, transistor matching).
- Desired: Analog layout design (differential symmetry; ground shielding; high-frequency impedances; current returns; noise coupling; transistor parasitics; parasitic fringe capacitances).
職位發(fā)布者
Photonic HR
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推薦朋友
光梓信息科技（上海）有限公司
領(lǐng)域: 通信網(wǎng)絡(luò)
規(guī)模: 0-50人
主頁: http://www.photonic-tech.com
工作地址:
上海市浦東新區(qū)郭守敬路498號19號樓（地鐵金科路站）
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滬公網(wǎng)安備31011502017136號