ASIC Design methodology Engineer
- 15萬-30萬/年
- 上海
- |
- 應(yīng)屆生/在校生
- |
- 本科
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- 全職
職位誘惑: 年終獎(jiǎng)金,五險(xiǎn)一金,福利好,技術(shù)領(lǐng)先,免費(fèi)班車,成長空間大,年底雙薪,交通補(bǔ)助,老板nice
發(fā)布時(shí)間: 2019-02-25發(fā)布
職位描述
ASIC Design methodology Engineer
Responsibilities:
• Participate in the design and implementation of the leading edge, front-end or back-end ASIC design flow which covers from logical design to physical implementation (synthesis, place and route etc)
• Participate in the research of Design Methodology to improve automation and productivity
• Work closely with design team for projects’ Tapeout
Requirements:
• Major in CS, EE or related, master or bachelor degree.
• Knowledge of ASIC design (Digital circuit design, verilogHDL) is required
• Be familiar with Linux working environment
• Experience in program with one or more languages (CShell, TCL, Perl or python etc.) is a plus
• Experience in any ASIC flow and/or EDA tools (DesignCompiler, Primetime, Formality, VSI-LP, ICC etc.) is a plus
• Good in English writing and speaking
• Be eager to learn new knowledge, be able to resolve complex problem.
職位發(fā)布者
AMD
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