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GLOBALFOUNDRIES

IC Design Engineer

收藏職位
  • 我要分享
  • 22萬-28萬/年
  • 北京
  • |
  • 應(yīng)屆生/在校生
  • |
  • 碩士
  • |
  • 全職

職位誘惑: 年終獎金,五險一金,老板nice,福利好,年底雙薪,交通補助,技術(shù)領(lǐng)先,技能培訓(xùn)

發(fā)布時間: 2018-06-15發(fā)布

職位描述


IC Design Engineer (Campus Hire)
 
Location: Beijing
 
Position Area:
●       (Logic) Logic Design and Verification Engineer
●       (Backend) Backend Design Engineer (DFT/PD/Timing/Package/Noise)
●       (Analog) Analog Circuit and Layout Design Engineer
●       (Memory) Memory Design Engineer
 
Responsibilities:
GLOBALFOUNDRIES IC Design Engineer will be working on most cutting-edge SoC (System on a Chip), ASIC, Digital, Mixed-Signal or Memory IP development for GLOBALFOUNDRIES WW clients. By employing the industry leading tools, methodology, and world-class semiconductor technologies ranging from 22nm, 14/12nm to 7nm and beyond, you will have the opportunities to participate in the delivery of various end-to-end silicon solutions, including architecture design and performance assessment, front-end logic design and verification, back-end implementation and optimization, a variety of IP development, methodology development and deployment, as well as chip hardware validation and support.
 
Requirements:
1. EE/CS or equivalent background in digital, analog or mixed-signal IC design related areas.
2. Research and development experience in one or more of the following skill areas:
●       Architectural design, assessment, and optimization
●       Proficient in Verilog/VHDL, and well conversant with programming and scripting languages
●       Digital logic design and verification on the basis of the target system/IP specification
●       SoC design methodology: Knowledge of SoC integration, modeling, verification and simulation at different abstract levels
●       ASIC back-end design methodology: Knowledge of synthesis, timing, DFT, floorplanning, physical design, signal/power integrity, packaging, and other back-end activities
●       Analog or mixed-signal circuit design, validation, implementation and test on Bulk CMOS, FinFET, or SOI technologies
●       Electronic Design Automation algorithm, tool, and methodology development
3. Research and development experience in one or more of the following application domains, will be a plus:
●       Communication, Wired and Wireless Networking
●       Edge Computing, Artificial Intelligence, Machine Learning
●       Data Center, High Performance Computing, Storage
●       Mobile, Automotive, Internet of Things (IoT)
●       Other emerging technology and industry areas
4. Good English and communication skills, and willingness to work with a global culture team. Skill of other languages will be a plus.
5. Good learning competency and be able to work in diverse areas in a dynamic environment.
 

職位發(fā)布者

Cathy zhang

HR

7天

簡歷處理用時

100%

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