Design Verification Intern
- 2萬-3萬/年
- 上海
- |
- 工作經(jīng)驗(yàn)不限
- |
- 碩士
- |
- 實(shí)習(xí)
職位誘惑: 技術(shù)領(lǐng)先,成長(zhǎng)空間大
發(fā)布時(shí)間: 2019-02-25發(fā)布
職位描述
Intern Engineer - ASIC Verification (Shanghai)
KEY RESPONSIBILITIES
· Work together with leading edge AMD APU SOC chip team
· Responsible for regression maintenance of GPU subsystem.
· Script (Shell, Perl) development for flow enhancement.
· Status collection and reporting
REQUIREMENTS
· M.S. in CS, EE or equivalent is required
· Good English required
· 6-Month internship, 4 days per week at least (至少能夠?qū)嵙?xí)半年,每周4-5天)
· Will graduate in 2019 or later (2019年畢業(yè))
EXPERIENCE AND SKILLS
· Familiar with Verilog/System verilog
· Familiar with Linux and C/C++
· Experience with Linux shell or script development (Perl)
· Good communication skills in English
· Experience in semiconductor industry is a plus
職位發(fā)布者
AMD
HR
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AMD
領(lǐng)域: 移動(dòng)手持,消費(fèi)電子
規(guī)模: 1000人以上
主頁(yè): http://www.amd.com
工作地址:
上海市浦東新區(qū)張東路1387號(hào)46-49棟
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