- 35萬-45萬/年
- 上海
- |
- 5年以上
- |
- 碩士
- |
- 全職
職位誘惑: 五險一金,年底雙薪,天天下午茶,年度旅游,技術(shù)領(lǐng)先,成長空間大,節(jié)日禮物
發(fā)布時間: 2019-03-29發(fā)布
職位描述
RESPONSIBILITIES:
1. Develop the specification & implement the circuit for the DDR blocks.
2. Design DDR/DDR2/DDR3 memory PHY both for receiver and transmitter.
3. Interact with the layout team and guide the critical layout area.
4. Support test & product team with chip debugging.
5. Assist systems team for board design & debug.
6. Inateract with chip atchitecture and study industry standards to understand system requirements and perform feasibility study of new product proposals.
EDUCATION/SKILLS:
1. BSEE/MSEE with Minimum 5-year experience in DDR design.
2. Well understand DDR/DDR2/DDR3 protocal.
3. Experience with analog simulation environment and schematic simulation.
4. Good English communication skill is required.
5. Experienced with FPGA is a plus.
6. Self-motivated and a strong team player.
職位發(fā)布者
滬公網(wǎng)安備31011502017136號