Analog Design Engineer/Staff Analog Design Engineer
- 30萬-55萬/年
- 上海
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- 工作經(jīng)驗不限
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- 碩士
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- 全職
職位誘惑: 福利好,技術(shù)領(lǐng)先,成長空間大
發(fā)布時間: 2017-11-14發(fā)布
職位描述
JOB DESCRIPTION:
- Work with digital team for new product development.
- Design, simulation and verification of high speed CMOS analog and mixed-signal circuits. - High speed system behavioral modeling.
- Supervise layout floor plan and design of IC blocks. - Silicon test, characterization and lab debugging.
- Support test, product and application team to push IC to production.
QUALIFICATION:
- MSEE or above with minimum 8 years of working experience(Staff)
MSEE. 1-3 years experience in analog design(Analog Design Engineer)
Strong experience in DFE (Decision Feedback Equalizer) or CDR (Clock Data Recovery) circuit design - Experience in DDR or other high speed designs (e.g. PCIe, HDMI, SerDes) preferred.
- Good system level knowledge on high speed serial link
- Strong lab experience on silicon debugging, good understanding on lab instruments (e.g BERT, oscilloscope)
- Good understanding of deep submicron CMOS technology process and device physics.
- Tape-out experience with 40nm, 28nm preferred.
- Proficiency of EDA design tools (Virtuoso, Spectre, HSPICE, AMS, etc).
- Experiences in Verilog, Verilog-A and/or MATLAB.
- Good communication skill and good command of written English are highly desired.