SENIOR VERIFICATION ENGINEER
- 25萬-50萬/年
- 上海
- |
- 3年以上
- |
- 碩士
- |
- 全職
職位誘惑: 技術(shù)領(lǐng)先,年終獎(jiǎng)金,福利好
發(fā)布時(shí)間: 2017-11-14發(fā)布
職位描述
JOB DESCRIPTION:
- Participate ASIC digital verification for various PCIe IP/SoC projects;
- Create PCIe verification plans with designers;
- Develop DV architecture and verification environment;
- Verification execution and sign-off;
SKILLS MANDATORY:
- Excellent team working style;
- Production experiences on PCIe Gen 3 products;
- Solid IP/SoC verification background:
- Mass production for verified IP/SoC
- Bachelor with 7+ years working experiences on ASIC digital verification (Master with 5+ years )
- Expert on SystemVerilog/UVM
- Expert on scripting
- Good English skills (read and write).
職位發(fā)布者
michaelyang
Team Leader/ Tech Leader
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