Responsibilities:

• To formulate and drive process improvement plan based on systematic analysis of inline/ET/yield data to meet quality and yield targets.
• To own processes and manage independently on process/inline/ET/yield issues to meet line yield/sort yield/ET target performance.
• To execute systematic process transfers from TD or Process Integration group for mass production and thereby maintain or improve process robustness and manufacturability.
• To identify and prioritize key process weaknesses for baseline continuous improvement to yield/quality/productivity and cost.
• To work closely with module process/equipment engineers to formulate and implement robust technical improvement solutions.
• To work closely with Yield Defect Density/Modules engineers to swiftly contain high DD and inline excursions and find root causes and provide working solutions.
• Maintain and fine-tune existing process technologies for baseline improvement and support continuous yield enhancement

• PHD / Masters / Degree in Microelectronics/Electrical/Electronics Engineering or Science in Physics/Chemistry/Material Science or related field.
• At least 2 years relevant experience in semiconductor manufacturing and yield improvement.
• Good interpersonal and effective communication skills.
• Good presentation skills with strong problem-solving skill.
• Able to perform under a fast paced and challenging environment.