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AMD

ASIC Layout Design Engineer

收藏職位
  • 我要分享
  • 30萬-40萬/年
  • 上海
  • |
  • 3年以上
  • |
  • 本科
  • |
  • 全職

職位誘惑: 五險一金,福利好,老板nice

發(fā)布時間: 2019-02-25發(fā)布

職位描述

Responsibilities:
•     Understand the ASIC design/verification flow and help design/verification engineers to accomplish targets.
•     Develop infrastructure and environment for IP/SoC level design verification.
•     Closely working with Design/Architecture/Verification team to develop new verification component.
 
Requirements:
•     Major in Electrical Engineering, Computer Science or related
•     Good understanding on ASIC design verification flow
•     Good design verification experience
•     Programming knowledge on Verilog/SystemVerilog, C/C++
•     Knowledge on Perforce, OVL, SVA, SV, UVM, script programming etc.
•     Should have good communication skills (both written and oral) and should be able to participate cross functional engineering teams geographically.
•     Strong problem solving skills
 

職位發(fā)布者

AMD

HR

7天

簡歷處理用時

100%

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Advanced Micro Devices

AMD

領(lǐng)域: 移動手持,消費(fèi)電子

規(guī)模: 1000人以上

主頁: http://www.amd.com

工作地址:

上海市浦東新區(qū)張東路1387號46-49棟

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