ASIC Layout Design Intern
- 2萬-3萬/年
- 上海
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- 應(yīng)屆生/在校生
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- 碩士
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- 實習(xí)
職位誘惑: 技術(shù)領(lǐng)先,成長空間大
發(fā)布時間: 2019-02-27發(fā)布
職位描述
RESPONSIBILITIES:
• Overseas definition, design, verification, and documentation for ASIC development
• Determines architecture design, logic design, and system simulation
• Defines module interfaces/formats for simulation
• Contributes to the development of multidimensional designs involving the layout of complex integrated circuits
• Evaluates all aspects of the process flow from high-level design to synthesis, place and route, and timing and power use
• Analyzes equipment to establish operation data, conducts experimental tests, and evaluates results
• May also review vendor capability to support development
REQUIREMENTS:
• Familiar with Verilog HDL coding and ASIC Frond-End implementation flow
• Computer architecture and computer arithmetic
• Computer graphics basic knowledge
• Experience with database technologies and database-driven custom web application development
• Familiar with Unix/Linux and scripts (TCL, Ruby, Perl, Python etc.)
• Strong problem solving skills, and attention to details
• Strong task-based organization skills
• Good interpersonal skills (verbal and written)
• Strong passion in achievement and career development