Job Title:         ASIC Physical Design Engineer/Manager
Job description（工作描述）：
The ASIC Physical Design Engineer/Manager is the interface to the customer for all aspects related to INVECAS ASIC design services.
Responsibilities（職責）：

• Interfacing ASIC customers, sales, AE and overseas INVECAS physical design teams.
• Coordinate with physical design teams to perform physical implementation steps from netlist to GDSII implementation, including synthesis, floor planning, place and route, power/clock distribution, congestion analysis, timing closure, CDC analysis and formal verification.
• Perform technical evaluations of process nodes and IP libraries, and provide recommendations to customers accordingly. 
• Develop physical design methodologies and automation scripts for various implementation steps. 

• Bachelor degree in Electronics Engineering, or closely related field. MSEE preferred.
• Experience in leading one or more aspects of physical design in 55nm to 14nm process nodes.
• Experience in physical design flows and methodologies (including synthesis, place and route), STA, formal verification, CDC and power analysis using tools such as Design Compiler, ICC/ICC2, Innovus/EDI, Primetime, Conformal, etc. 
• Experience in IP integration (e.g. memories, IO’s and Analog IP, etc.). 
• Experience in extraction of design parameters, QOR metrics, and in analyzing trends. 
• Working knowledge of semiconductor device physics and transistor characteristics. 
• Working knowledge of Verilog/System Verilog.
• Excellent verbal and written communication skills in English. Proven customer facing skills.