Responsibilities:
• Participate in mix-signal IC product design:
• Chip/block level RTL design and implementation. 
• Design FIR/IIR and signal processing blocks from algorithm, convert Algorithms to digital design.
• Architecture definition according to product spec.
• Participate in block and chip level verification:
• Modeling/simulating/debugging digital circuit with Verilog/system Verilog/UVM or C++
• Participate in block/system level digital/mix-signal test bench development
• Making verification plan, creating test cases and analyzing test results
Requirement:
• MSEE or PhD in Microelectronics/Electrical Engineering or relate.
• Self-motivation, result oriented, good team work and communication skills
• Excellent problem solving skill
• Knowledge with digital signal processing and Mat lab skills is a plus.
• Scripts (perl, tcl, c shell) skill is a plus.
• Digital implementation experience is a plus.
• Good initiative and motivation in a challenging environment
• Good spoken and written English