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百瑞互聯(lián)

Bluetooth Design/Verification Engineer

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    ¥2k
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  • 25萬-50萬/年
  • 上海
  • |
  • 工作經(jīng)驗不限
  • |
  • 本科
  • |
  • 全職

職位誘惑: 股票期權(quán),年終獎金,五險一金,福利好,老板nice,技術(shù)領(lǐng)先,成長空間大,節(jié)日禮物

發(fā)布時間: 2019-05-17發(fā)布

職位描述


Job Description
·        Bluetooth baseband and modem integration for SoC and verification
·        RTL handoff quality check using EDA tools
·        Prepare relevant SDC file
·        Prepare relevant UPF file
·        Co-work and Support ASIC implementation
·        Co-work and Support FPGA prototyping
·        Co-work and Support software and system productions
·        Write design documents
Qualifications
·        2+ years hands-on experience in RTL design, integration, verification in Bluetooth & BLE Baseband and Modem.
·        ASIC design verification and implementation knowledge
·        Good knowledge to RTL QA tools (for example Spyglass)
·        Good knowledge to UPF and low power verification (for example VCLP and VCS-NLP)
·        Good knowledge to Matlab
·        English documents reading
·        Good programming in Perl/Python, TCL and Shell programming
·        Good team work and communication skills
 

職位發(fā)布者

魯冬梅

HR

7天

簡歷處理用時

100%

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