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景略半導體
Digital IC Design/Verification Engineer
收藏職位
- 12萬-18萬/年
- 上海
- |
- 應屆生/在校生
- |
- 碩士
- |
- 全職
職位誘惑: 五險一金,福利好,老板nice,技術領先,成長空間大,技能培訓
發(fā)布時間: 2019-06-28發(fā)布
職位描述
Description
- As a team member to design and verification next-generation Mixed-Signal Communication SoC
- Digital IC design including synthesis, verification, algorithm implementation, etc.
- Program development in TCL/Python/... to improve productivity
- MS in ME, EE or CS.
- Positive, active, self-motivated and teamwork
- Experiences on Cadence, Synopsys, Mentor EDA tools
- Real tape-out experience is a good plus
- Experiences on verification on FPGA and familiar with FPGA EDA tools is a plus
- Familiar with HW/SW interface, any CPU ISA like RISC-V/ARM/MIPS/... is a plus
職位發(fā)布者
郭雄飛
設計總監(jiān)
7天
簡歷處理用時
100%