ASIC digital verification engineer
- 18萬-30萬/年
- 上海
- |
- 應(yīng)屆生/在校生
- |
- 本科
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- 全職
職位誘惑: 五險一金,福利好,老板nice,成長空間大,技術(shù)領(lǐng)先,技能培訓
發(fā)布時間: 2018-10-10發(fā)布
職位描述
Job Scope:
SoC/IP verification
Job Responsibilities
- Work with designer to get a full deep insight on the design and develop test plan
- Build test bench and create testcase to ensure test coverage
- Run simulation in both RTL and netlist level, debug and fix issues, create test reports
Job Qualifications
- MSEE/MSCS Degree or equivalent
- Experienced in Verilog/System Verilog coding.
- Be good at C/C++ or perl/python