IC Verification lead
Responsibilities: 
-   Build verification plan and verify the function of design, run coverage and regression. Analyze coverage gaps and devise strategy to fill coverage holes
-   Develop verification platform, including test bench and regression system creation,
-   Work with designers to debug failing tests and resolve bugs
Qualification: 
-   BSEE with 8+ (or MSEE with 5+) years’ experience on SOC verification
-   Solid understanding of verification methodology, hands on experience on:
a)      Directed tests and random tests
b)      functional coverage and assertion-based verification
c)      System Verilog/UVM, C, C++,
d)      lower power verification with CPF/UPF.
-   Experience in developing both block and chip level test benches, test plan creation. 
-   Practical skill with gate-level simulation and debugging techniques. 
-   Strong script programming skills, such as Shell or Perl programming to develop command scripts.
-   Well organized, strong communication skill, work smart, and result oriented
 
IC 驗證主管
職責(zé)描述：
-   訂立芯片驗證計劃，建立芯片系統(tǒng)級驗證平臺，驗證設(shè)計功能，收集，分析和提高各種coverage。
-   和設(shè)計團隊一起分析，解決所發(fā)現(xiàn)的bug.
任職資格: 
-   碩士畢業(yè)，5年以上 SOC 驗證經(jīng)驗；或本科畢業(yè)，8年以上SOC驗證經(jīng)驗
-   深入理解驗證方法學(xué)， 有以下的實際項目經(jīng)驗:
a)      Corner cases和 random cases驗證
b)      功能覆蓋率的定義，收集和提高； 基于assertion的驗證
c)      System Verilog/UVM, C, C++實戰(zhàn)經(jīng)驗
d)      基于CPF/UPF的低功耗設(shè)計的驗證.
-   模塊級和芯片級的驗證環(huán)境搭建 
-   門級仿真和debug的實際項目經(jīng)驗. 
-   較強的Scripting 能力，如 Tcl/Perl/Python
-   較強的溝通和組織協(xié)調(diào)能力，結(jié)果導(dǎo)向。