IP Digital Engineer
- 25萬(wàn)-30萬(wàn)/年
- 蘇州
- |
- 3年以上
- |
- 本科
- |
- 全職
職位誘惑: 年終獎(jiǎng)金,五險(xiǎn)一金,福利好,老板nice,技術(shù)領(lǐng)先,成長(zhǎng)空間大
發(fā)布時(shí)間: 2022-11-10發(fā)布
職位描述
崗位職責(zé):
Job Description:
1. To work on digital circuit design in following IP: DDR-PHY,high speed digital PLL/DLL, Digital LDO,high speed Serdes.
2. To perform digital IP synthesis/timing analysis/formality check/CDC check etc.
3. To perform verilog verification and co-sim verification.
任職資格:
Qualifications:
1. MSEE 3+ years Experience in digital design.
2. Very familiar with digital design flow.
3. Strong skills of RTL coding, simulation, debugging.
4. Experienced EDA tools such as DC,PT, LEC etc.
5. Experienced in DDR、USB 、PICE PHY design is plus.
職位發(fā)布者
孫曉琛
HR
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規(guī)模: 1000人以上
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工作地址:
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