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百瑞互聯(lián)

ASIC Design Engineer 數(shù)字芯片設(shè)計工程師(實習(xí)生)

收藏職位
  • 我要分享
  • 6萬-12萬/年
  • 上海
  • |
  • 應(yīng)屆生/在校生
  • |
  • 碩士
  • |
  • 實習(xí)

職位誘惑: 年終獎金,福利好,老板nice,股票期權(quán),成長空間大,節(jié)日禮物,年度旅游,技術(shù)領(lǐng)先,交通補助,技能培訓(xùn),五險一金

發(fā)布時間: 2019-05-17發(fā)布

職位描述


·        Independent block and SoC RTL design and verification
·        Analog and digital IP integration
·        RTL handoff quality check using EDA tools
·        Prepare signoff quality full chip SDC file
·        Prepare signoff quality full chip UPF file
·        Support ASIC implementation
·        Support FPGA prototyping
·        Support DFT integration
·        Support software and system production
·        Write design documents
Qualifications
·        2+ years hands-on experience in ASIC RTL design. Experience in Bluetooth, Mobile Computing or IoT is a plus
·        Familiar with popular ASIC solutions (including specification and architecture)
·        Familiar with ASIC design verification and implementation flow
·        Familiar with relevant QA tools (for example Spyglass)
·        Strong debugging and analytical skills, generate ideas, and provide innovative solutions to solve technical problems
·        English documents reading
·        Good programming in Perl/Python, TCL and Shell programming
·        Self-motivated, team work, and good communication skills

 

職位發(fā)布者

魯冬梅

HR

7天

簡歷處理用時

100%

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