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大唐恩智浦半導體有限公司

Verification Engineer (Mixed signal)

收藏職位
  • 我要分享
  • 30萬-50萬/年
  • 上海
  • |
  • 5年以上
  • |
  • 本科
  • |
  • 全職

職位誘惑: 年終獎金,五險一金,福利好,年度旅游,成長空間大,通訊津貼,交通補助,節(jié)日禮物,技能培訓

發(fā)布時間: 2019-11-20發(fā)布

職位描述

A. Main Purpose of the Role:
Develop Verification Plan for product
Perform verification testing & track product problem
Develop Verification Report for product
Provide procedure and technical training to new engineers
 
B. Key Areas of Accountability:
Develop Verification Plan (include but not limited to: )
- Review product requirement specification and clearly understand each requirement in requirement specification documentation
- Estimate resource (manpower and capital) requirement for certain amount of verification work
- Understand the analysis of hazardous impact of product to different personnel (patient, operator, etc...)
- Develop test case per each requirement in requirement specification documentation
- Schedule test case review meeting with relevant parties
Perform verification testing & track product problem (include but not limited to: )
- Setup test environment per Verification Plan
- Execute each test case on test bays
- Log defect to defect management tool

職位發(fā)布者

datang nxp

HR

7天

簡歷處理用時

100%

簡歷及時處理率

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