IC Layout Engineer 模擬IC版圖設計工程師
- 10萬-20萬/年
- 成都
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- 應屆生/在校生
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- 本科
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- 全職
職位誘惑: 年終獎金,福利好,老板nice,技術領先
發(fā)布時間: 2021-03-19發(fā)布
職位描述
In this position, you will work closely with circuit designers both in China and US to perform original, customized analog / mixed signal IC layout.該職位將緊密與中國區(qū)和美國區(qū)的IC設計工程師一起去完成新產品的,全定制的模擬和混合信號IC版圖設計.
Responsibility崗位職責:
· Main responsibility is analog / mixed signal IC layout主要負責模擬和混合信號IC版圖設計
· You will be responsible for all levels of analog mask layout from floor planning, ESD pad placement, block level layout up to top level integration and tape out主要負責所有模擬電路版圖的整體布局、靜電保護設計和模塊到頂層的集成設計和流片
· You will communicate and get directions from the analog design engineers to ensure high quality 主要負責與模擬IC設計工程師溝通并確定方向以確保產品的高質量
Requirement 崗位要求:
· BS degree in electronics or microelectronics engineering or equivalent電子工程學或微電子學等專業(yè),本科及同等學歷
· Understand the basic fundamental of electrical engineering具備基本的電子工程知識
· Understanding of layout impact on device matching, noise coupling from signal, supply and substrate 知曉版圖設計對器件匹配,信號干擾,信號線及襯底的影響
· Understanding basic characteristics of transistor, resistor, capacitor and diode 具備基本的晶體管、電阻器、電容器和二極管知識
· Understanding the importance of signal flow, power/ground structure and block placement in layout floor planning知曉信號走向,電源及地線結構和模塊頂層布局的重要性
· Understanding the importance of communication with analog designers知曉該工作與模擬電路設計師溝通的重要性
· Must be familiar with DRC/LVS verification tools需熟悉DRC/LVS等驗證工具
· Must be familiar with Unix OS 需熟練操作Unix OS系統(tǒng)
· Must be familiar with layout tools, such as Cadence Virtuoso, etc.需熟練操作Layout 工具,如:Cadence Virtuoso等
· English, written and verbal, sufficient for technical discussions英語讀寫流利,能進行技術交流和溝通
職位發(fā)布者
MPS HR
簡歷處理用時
簡歷及時處理率
MPS
領域: 消費電子,智能硬件,汽車電子
規(guī)模: 1000人以上
主頁: http://www.monolithicpower.com/
工作地址:
高新西區(qū)綜合保稅區(qū)科新路8號附3號
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