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瀾起科技

設(shè)計驗證工程師

收藏職位
  • 我要分享
  • 30萬-45萬/年
  • 西安
  • |
  • 3年以上
  • |
  • 碩士
  • |
  • 全職

職位誘惑: 五險一金,年度旅游,技術(shù)領(lǐng)先,成長空間大,老板nice,福利好,十五薪,節(jié)日禮物,股票期權(quán)

發(fā)布時間: 2020-11-25發(fā)布

職位描述

JOB DESCRIPTION:
- Participate ASIC digital verification for various IP/SoC projects;
- Create verification plans with designers;
- Develop DV architecture and verification environment;
- Verification execution and sign-off;
SKILLS MANDATORY:
- Excellent team working style;
- Solid IP/SoC verification background:
- Mass production for verified IP/SoC
- Master with3> years working experiences on ASIC digital verification
- Familiar with DSP、CPU or Trace & Debug verification
- Production experiences on verification strategies and testplans;
- Familiar with SystemVerilog/UVM for testbench creation, debug, reuse, constrained-random stimulus and functional coverage;
- Production experiences on ARM buses, such as AXI/AMBA/APB is a plus;
- Familiar with verification tools ;
- Familiar with Linux, csh/Python or any script languages;
- Good English skills (read and write).

職位發(fā)布者

Peter

HR

7天

簡歷處理用時

100%

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