Layout Engineer-2021應(yīng)屆畢業(yè)生

Micron Technology’s vision is to transform how the world uses information to enrich life and our dedication to people, innovation, tenacity, partnership, and customer focus allows us to fulfill our mission to be global leader in memory and storage solutions. This means conducting business with integrity, accountability, and collaboration while supporting our global community.

該崗位會(huì)有1個(gè)月的實(shí)習(xí)培訓(xùn)期，實(shí)習(xí)期根據(jù)學(xué)生時(shí)間而定，目前暫定三批，實(shí)習(xí)考核通過之后會(huì)正式發(fā)放offer。
Description:
 As an IC Layout Design Engineer at Micron's Shanghai Design Center, you will work in a highly innovative and motivated design team using state of the art memory technologies to advance DRAM Memory design.
 As part of a multi-disciplinary team, you will contribute to physical layout floor plan of various memory chip circuit blocks, and perform block level layout, LVS/DRC verification and using other CAD tools to check layout.
Career Path/Development:

1. Global Opportunity:
   1. Work closely with Micron's various design/PI/CAD teams in US and other countries to deliver memory products.
   2. Provide overseas working opportunity. Acquiring global experience for your future career path within Micron
2. Skill Advancement:
   1. Wide exposure to advanced technologies and process nodes
   2. Leveraging various resources and tools, like digital place & route and perform verification  layout to a FULL-CHIP level supporting project tape out
   3. Provide systematic layout training programs for further development

 
Requirement:
 -Bachelor’s degree (or above) in Electrical Engineering or other related engineering field.
 -Proficiency with Cadence OA and Calibre verification tools desirable.
 -Understanding of basic CMOS circuits is a plus.
 -Understanding of DRAM/Flash architecture or previous memory layout experience is a plus.
 -English language skill in writing and speaking is a plus.
 
Education:
 Bachelor’s degree (or above) in Electrical Engineering or other related engineering field.