Job Responsibilities:
Front-end application engineer support Synopsys products including synthesis, STA, DFT, formal verification and low power solutions. In addition, they are expected to articulate design methodologies involving Synopsys tools and be elevator-talk proficient in the full Synopsys tool portfolio.

Requirements: MSEE, or equivalent required with 3+ years of experience, or BSEE or equivalent with 5+ years of experience. Design experiences should include SoC design using Verilog/VHDL, physical aware synthesis, DFT, STA and timing ECO. Experiences in other SoC design activities such as low power design, formal verification and physical design are strongly desired. Excellent verbal and written presentation/communication skills are mandatory. Customer sensitivity, the ability to multiplex many issues & set priorities and have a helpful/caring attitude towards customers, and the desire to help customers exploit new technologies are essential for success in the position.